MINI-AUTOCODER A3 WEDNESDAY, 21-DEC-94 19:57:41 Page 1 A3 TEST SIGN BIT MANIPULATION (ADD) A3 JOB TEST SIGN BIT MANIPULATION (ADD) 500 500 ORG 500 500 500 /332 START CS 332 504 504 / CS 505 505 LV97250 MLCWA@TEST OF SIGN BIT CONTROLS (ADD)@,250 512 512 2 W 513 513 /299 CS 299 517 517 LW28250 MLCWA@-------------------------------@,250 524 524 2 W 525 525 /299 CS 299 529 529 . H * 530 530 LW38250 MLCWA@A: NO SIGN@,250 537 537 2 W 538 538 /299 CS 299 * * A=0 B=0 => 0 * 542 542 MV51V61 MLC N1,ADATA 549 549 MV53V63 MLC N2,BDATA 556 556 MV55V59 MLC N3,EXP 563 563 BS94 B WRT * * A=0, B=A => A * 567 567 MV53V61 MLC N2,ADATA 574 574 MV35V63 MLC A1,BDATA 581 581 MV39V59 MLC A3,EXP 588 588 BS94 B WRT * * A=0, B=B, A>B => AB * -01 + 02 * 592 592 MV53V61 MLC N2,ADATA 599 599 MV43V63 MLC B1,BDATA 606 606 MV27V59 MLC AB1,EXP 613 613 BS94 B WRT * * A=0, B=B, A<=B => B, CASE 1, A B, CASE 1, A=B * 642 642 MV51V61 MLC N1,ADATA 649 649 MV43V63 MLC B1,BDATA 656 656 MV41V59 MLC B0,EXP 663 663 BS94 B WRT * MINI-AUTOCODER A3 WEDNESDAY, 21-DEC-94 19:57:41 Page 2 A3 TEST SIGN BIT MANIPULATION (ADD) * A=0, B=AB => AB * 667 667 MV53V61 MLC N2,ADATA 674 674 MV27V63 MLC AB1,BDATA 681 681 MV31V59 MLC AB3,EXP 688 688 BS94 B WRT * 692 692 LW46250 MLCWA@A: A-BIT@,250 699 699 2 W 700 700 /299 CS 299 * * A=A, B=0 => 0 * 704 704 MV35V61 MLC A1,ADATA 711 711 MV53V63 MLC N2,BDATA 718 718 MV55V59 MLC N3,EXP 725 725 BS94 B WRT * * A=A, B=A => A * 729 729 MV35V61 MLC A1,ADATA 736 736 MV37V63 MLC A2,BDATA 743 743 MV39V59 MLC A3,EXP 750 750 BS94 B WRT * * A=A, B=B, A>B => AB * 754 754 MV37V61 MLC A2,ADATA 761 761 MV43V63 MLC B1,BDATA 768 768 MV27V59 MLC AB1,EXP 775 775 BS94 B WRT * * A=A, B=B, A B * 779 779 MV35V61 MLC A1,ADATA 786 786 MV45V63 MLC B2,BDATA 793 793 MV43V59 MLC B1,EXP 800 800 BS94 B WRT * * A=A, B=B, A=B => B * 804 804 MV35V61 MLC A1,ADATA 811 811 MV43V63 MLC B1,BDATA 818 818 MV41V59 MLC B0,EXP 825 825 BS94 B WRT * * A=A, B=AB => AB * 829 829 MV35V61 MLC A1,ADATA 836 836 MV29V63 MLC AB2,BDATA 843 843 MV31V59 MLC AB3,EXP 850 850 BS94 B WRT MINI-AUTOCODER A3 WEDNESDAY, 21-DEC-94 19:57:41 Page 3 A3 TEST SIGN BIT MANIPULATION (ADD) * 854 854 LW54250 MLCWA@A: B-BIT@,250 861 861 2 W 862 862 /299 CS 299 * * A=B, B=0, A>B => B * 866 866 MV45V61 MLC B2,ADATA 873 873 MV51V63 MLC N1,BDATA 880 880 MV43V59 MLC B1,EXP 887 887 BS94 B WRT * * A=B, B=0, A AB * 891 891 MV43V61 MLC B1,ADATA 898 898 MV53V63 MLC N2,BDATA 905 905 MV27V59 MLC AB1,EXP 912 912 BS94 B WRT * * A=B, B=0, A=B => AB * 916 916 MV43V61 MLC B1,ADATA 923 923 MV51V63 MLC N1,BDATA 930 930 MV25V59 MLC AB0,EXP 937 937 BS94 B WRT * * A=B, B=A, A>B => B * 941 941 MV45V61 MLC B2,ADATA 948 948 MV35V63 MLC A1,BDATA 955 955 MV43V59 MLC B1,EXP 962 962 BS94 B WRT * * A=B, B=A, A AB * 966 966 MV43V61 MLC B1,ADATA 973 973 MV37V63 MLC A2,BDATA 980 980 MV27V59 MLC AB1,EXP 987 987 BS94 B WRT * * A=B, B=A, A=B => AB * 991 991 MV43V61 MLC B1,ADATA 998 998 MV35V63 MLC A1,BDATA 1005 Ø05 MV25V59 MLC AB0,EXP 1012 Ø12 BS94 B WRT * * A=B, B=B, => B * 1016 Ø16 MV43V61 MLC B1,ADATA 1023 Ø23 MV45V63 MLC B2,BDATA 1030 Ø30 MV47V59 MLC B3,EXP MINI-AUTOCODER A3 WEDNESDAY, 21-DEC-94 19:57:41 Page 4 A3 TEST SIGN BIT MANIPULATION (ADD) 1037 Ø37 BS94 B WRT * * A=B, B=AB, A>B => B * 1041 Ø41 MV45V61 MLC B2,ADATA 1048 Ø48 MV27V63 MLC AB1,BDATA 1055 Ø55 MV43V59 MLC B1,EXP 1062 Ø62 BS94 B WRT * * A=B, B=AB, A AB * 1066 Ø66 MV43V61 MLC B1,ADATA 1073 Ø73 MV29V63 MLC AB2,BDATA 1080 Ø80 MV27V59 MLC AB1,EXP 1087 Ø87 BS94 B WRT * * A=B, B=AB, A=B, => AB * 1091 Ø91 MV43V61 MLC B1,ADATA 1098 Ø98 MV27V63 MLC AB1,BDATA 1105 /05 MV25V59 MLC AB0,EXP 1112 /12 BS94 B WRT * 1116 /16 LW63250 MLCWA@A: AB-BIT@,250 1123 /23 2 W 1124 /24 /299 CS 299 * * A = AB, B=0 => 0 * 1128 /28 MV27V61 MLC AB1,ADATA 1135 /35 MV53V63 MLC N2,BDATA 1142 /42 MV55V59 MLC N3,EXP 1149 /49 BS94 B WRT * * A = AB, B=A => A * 1153 /53 MV27V61 MLC AB1,ADATA 1160 /60 MV37V63 MLC A2,BDATA 1167 /67 MV39V59 MLC A3,EXP 1174 /74 BS94 B WRT * * A=AB,B=B, A>B => AB * 1178 /78 MV29V61 MLC AB2,ADATA 1185 /85 MV43V63 MLC B1,BDATA 1192 /92 MV27V59 MLC AB1,EXP 1199 /99 BS94 B WRT * * A=AB, B=B, A B * 1203 S03 MV27V61 MLC AB1,ADATA 1210 S10 MV45V63 MLC B2,BDATA MINI-AUTOCODER A3 WEDNESDAY, 21-DEC-94 19:57:41 Page 5 A3 TEST SIGN BIT MANIPULATION (ADD) 1217 S17 MV43V59 MLC B1,EXP 1224 S24 BS94 B WRT * * A=AB, B=B, A=B => B * 1228 S28 MV27V61 MLC AB1,ADATA 1235 S35 MV43V63 MLC B1,BDATA 1242 S42 MV41V59 MLC B0,EXP 1249 S49 BS94 B WRT * * A=AB, B=AB => AB * 1253 S53 MV27V61 MLC AB1,ADATA 1260 S60 MV29V63 MLC AB2,BDATA 1267 S67 MV31V59 MLC AB3,EXP 1274 S74 BS94 B WRT * 1278 S78 LW79250 MLCWA@END OF SIGN TEST@,250 1285 S85 2 W 1286 S86 /299 CS 299 1290 S90 .S90 H *-3 * * SUBROUTINE TO COMPUTE RESULT AND PRINT IT OUT * 1294 S94 HV23 WRT SBR WRTR+3 1298 S98 MV63V57 MLC BDATA,SUM 1305 T05 AV61V57 A ADATA,SUM 1312 T12 YV57V64 MLZS SUM,SIGN 1319 T19 DV57V66 MLNS SUM,DIGITS 1326 T26 M MLC 1327 T27 LW80280 MLCWA@)@,280 1334 T34 LV64 MLCWASIGN 1338 T38 LV66 MLCWADIGITS 1342 T42 LW82 MLCWA@ (@ 1346 T46 LV57 MLCWASUM 1350 T50 LW89 MLCWA@, GOT: @ 1354 T54 HT76 SBR P1+3 1358 T58 YV59V64 MLZS EXP,SIGN 1365 T65 DV59V66 MLNS EXP,DIGITS 1372 T72 M MLC 1373 T73 N000 P1 NOP 0 1377 T77 LW80 MLCWA@)@ 1381 T81 LV64 MLCWASIGN 1385 T85 LV66 MLCWADIGITS 1389 T89 LW82 MLCWA@ (@ 1393 T93 LV59 MLCWAEXP 1397 T97 LX01 MLCWA@: EXPECTED: @ 1401 U01 HU23 SBR P2+3 1405 U05 YV63V64 MLZS BDATA,SIGN 1412 U12 DV63V66 MLNS BDATA,DIGITS 1419 U19 M MLC 1420 U20 N000 P2 NOP 0 MINI-AUTOCODER A3 WEDNESDAY, 21-DEC-94 19:57:41 Page 6 A3 TEST SIGN BIT MANIPULATION (ADD) 1424 U24 LW80 MLCWA@)@ 1428 U28 LV64 MLCWASIGN 1432 U32 LV66 MLCWADIGITS 1436 U36 LW82 MLCWA@ (@ 1440 U40 LV63 MLCWABDATA 1444 U44 LX04 MLCWA@ + @ 1448 U48 HU70 SBR P3+3 1452 U52 YV61V64 MLZS ADATA,SIGN 1459 U59 DV61V66 MLNS ADATA,DIGITS 1466 U66 M MLC 1467 U67 N000 P3 NOP 0 1471 U71 LW80 MLCWA@)@ 1475 U75 LV64 MLCWASIGN 1479 U79 LV66 MLCWADIGITS 1483 U83 LW82 MLCWA@ (@ 1487 U87 LV61 MLCWAADATA 1491 U91 HV10 SBR P4+3 1495 U95 CV57V59 C SUM,EXP 1502 V02 BV15S BE OK 1507 V07 N000 P4 NOP 0 1511 V11 LX16 MLCWA@********** @ 1515 V15 2 OK W 1516 V16 /299 CS 299 1520 V20 B000 WRTR B 0 * 1525 V25 AB0 DCW +00 1527 V27 AB1 DCW +01 1529 V29 AB2 DCW +02 1531 V31 AB3 DCW +03 1533 V33 A0 DCW @0Ø@ 1535 V35 A1 DCW @0/@ 1537 V37 A2 DCW @0S@ 1539 V39 A3 DCW @0T@ 1541 V41 B0 DCW -00 1543 V43 B1 DCW -01 1545 V45 B2 DCW -02 1547 V47 B3 DCW -03 1549 V49 N0 DCW 00 1551 V51 N1 DCW 01 1553 V53 N2 DCW 02 1555 V55 N3 DCW 03 1557 V57 SUM DCW #2 1559 V59 EXP DCW #2 1561 V61 ADATA DCW #2 1563 V63 BDATA DCW #2 1564 V64 SIGN DCW @ @ 1566 V66 DIGITS DCW #2 500 500 END START 1597 V97 LTRL @TEST OF SIGN BIT CONTROLS (ADD)@ 1628 W28 LTRL @-------------------------------@ 1638 W38 LTRL @A: NO SIGN@ 1646 W46 LTRL @A: A-BIT@ MINI-AUTOCODER A3 WEDNESDAY, 21-DEC-94 19:57:41 Page 7 A3 TEST SIGN BIT MANIPULATION (ADD) 1654 W54 LTRL @A: B-BIT@ 1663 W63 LTRL @A: AB-BIT@ 1679 W79 LTRL @END OF SIGN TEST@ 1680 W80 LTRL @)@ 1682 W82 LTRL @ (@ 1689 W89 LTRL @, GOT: 1701 X01 LTRL @: EXPECTED: 1704 X04 LTRL @ + 1716 X16 LTRL @********** MINI-AUTOCODER A3 WEDNESDAY, 21-DEC-94 19:57:41 Page 8 A3 TEST SIGN BIT MANIPULATION (ADD) A0 01533 A1 01535 A2 01537 A3 01539 AB0 01525 AB1 01527 AB2 01529 AB3 01531 ADATA 01561 B0 01541 B1 01543 B2 01545 B3 01547 BDATA 01563 DIGITS 01566 EXP 01559 N0 01549 N1 01551 N2 01553 N3 01555 OK 01515 P1 01373 P2 01420 P3 01467 P4 01507 SIGN 01564 START 00500 SUM 01557 WRT 01294 WRTR 01520